Reduced Instruction Set Computing

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Complex Instruction Set Computer - A Complex Instruction Set Computer (CISC) is a microprocessor instruction set architecture (ISA) in which each instruction can execute several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. The term was coined in contrast to Reduced Instruction Set Computer (RISC).

RISC OS - RISC OS, which stands for Reduced Instruction Set Computing Operating System is a British Graphical user interface-based operating system for ARM-processor based computers or similar devices. In certain countries (particularly the UK) it was an important operating-system before the dot-com computing era.

PA-RISC family - PA-RISC is a microprocessor architecture developed by Hewlett-Packard's Systems & VLSI Technology Operation. As the name implies, it is an implementation using a RISC (Reduced Instruction Set Computing) design, where the PA stands for Precision Architecture.

OISC - The OISC is the One Instruction Set Computer, by humorous analogy with RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer). The instruction set of the OISC is even smaller than that of a RISC: it contains exactly one instruction.

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Reduced Instruction Set Computer - Brief, very clear definition, with links to related issues and processors. [FOLDOC]

Wikipedia: Reduced Instruction Set Computer - Online encyclopedia article about RISC.

RISC: Reduced Instruction Set Computer - Acronym finder, has several similar, complementary definitions.

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